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Dielectric Deposition System is designed for 3D chip packaging.(Applied Materials Introduces Critical Via Liner Technology for 3D Chip Packaging)

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| April 13, 2010 | COPYRIGHT 2004 ThomasNet, Incorporated. (Hide copyright information)Copyright

Applied Producer[R] InVia(TM) dielectric deposition system uses CVD process to deposit uniform, thick oxide films in greater than 10:1 high aspect ratio (HAR) through-silicon via (TSV) structures. Process also enables electrical isolation of TSV to ensure reliable performance. For 3D packaging schemes, it electrically connects chips that are vertically stacked to boost speed and lower power consumption.

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SANTA CLARA, Calif. - Applied Materials, Inc. today added to its extensive line of 3D chip packaging solutions with the launch of its Applied Producer[R] InVia(TM) dielectric deposition system. Using a unique CVD* process, the InVia system …

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