A speed-doubling adapter for the high-speed logic analyzer.

With this simple adapter and enhanced software, the High-Speed Logic Analyzer can read data at an astounding 80-MHz sampling rate!

The High-Speed Logic Analyzer that was featured in the March 1998 issue of Electronics Now was designed to be expandable. One example of that feature was the Digital-Storage-Oscilloscope module that appeared in the May 1998 issue of Electronics Now.

Although the Logic Analyzer can sample signals at a 40-MHz rate, many users of the device have asked if the speed of the device can be increased. For those who have a "need for speed," the Speed-Doubling Adapter presented here is just what you've been asking for. With that adapter and a simple update to one of the programmable chips within the Logic Analyzer itself, you can capture samples at an 80-MHz rate, However, as with any performance gain in a piece of equipment, there. is usually a tradeoff. In this case, the number of channels available for sampling will be reduced from 16 to 8.

How it Works. As you can see from the schematic shown in Fig. 1, the Speed-Doubling Adapter is a very simple circuit. There are only two ICs: a voltage regulator and a clocked latch. The eight data inputs are connected to P1. That connector replaces the original data connector on the High-Speed Logic Analyzer. The logic signals are routed to two locations. First, they are applied directly to channels 1 through 8 on the Logic Analyzer. Second, they …