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Let me ask you: If your wildest dreams were realized, how many cores per CPU would you have in your servers, workstations and power desktops right now? How much Level 2 cache memory would you have in each core, or would you rather it be shared amongst the cores? Would you rather have memory controllers for each pair of cores that access a set-aside block of memory, or one memory controller that sees the entire address space?
Oh, so that's the sound of one million pages turning. I'll wager that the majority of my certifiably savvy readership hasn't given such nuts- and-bolts matters much thought. Well, Intel and AMD are giving it lots of thought right now, and I …